Igor’s research and work cover algorithms and applications for the PHY, MAC, and networking layers of communications systems. His first research role back in 2013 focused on signal processing algorithms for interference cancellation and multiple-input multiple-output (MIMO) processing in Digital Subscriber Lines based on the discrete multitone (DMT) modulation scheme. In this position, he also participated in a project focusing on multi-rate signal processing and highly parallelized DSP schemes for optical communications.

In 2014, as a master’s student, he started working on clock synchronization solutions for the so-called fronthaul of fifth-generation (5G) transport networks, namely the network segment connecting the baseband processing to the radio-frequency (RF) frontend. At this time, Igor focused on implementing one of the first published FPGA-based testbeds for clock synchronization experiments over an Ethernet-based fronthaul network. This work paved the way for his subsequent deeper investigations conducted as a Ph.D. student.

He started the Ph.D. program in 2016 and dedicated his research to applying the IEEE 1588 precision time protocol (PTP) over PTP-unaware Ethernet fronthaul networks. Using sophisticated signal processing and estimation strategies, he demonstrated nanosecond accuracy figures capable of enabling the most advanced 5G multi-cell and multi-user MIMO transmission schemes.

From 2017 to 2018, he worked on another unique clock synchronization problem: timing distribution over 60 GHz millimeter-wave (mmWave) wireless systems based on the IEEE 802.11ad standard. He participated in the H2020 Project 5G-PICTURE on behalf of Blu Wireless Technology (Bristol, UK), where, at the time, he was taking a year-long internship. His research focused on strategies to distribute PTP over 802.11ad and the synchronization performance achievable over real mmWave hardware.

Since the conclusion of the Ph.D. program, Igor has been working full-time on the Blockstream Satellite project. He spends most of his time developing solutions and operating a satellite network based on the DVB-S2 standard.


  • Clock Synchronization
  • PHY Algorithms
  • Digital Signal Processing
  • Wireless Communications
  • Software-defined Radio

Past Research Projects

  • 5G Fronthaul Synchronization via PTP

    Algorithms to improve the synchronization performance achieved with the IEEE 1588 precision time protocol (PTP) over 5G fronthaul networks.

    The radio devices deployed by the telecom operators are required to satisfy numerous frequency and phase synchronization requirements. In most deployments, these RF devices obtain physical frequency and phase references from specialized timing equipment, often tracing an international time standard (e.g., UTC) received via GNSS. Nevertheless, this architecture can be costly and severely limited for indoor deployments, where GNSS signals are typically blocked.

    As a solution, this research project, sponsored by Ericsson Research, aimed to investigate a cost-efficient synchronization architecture based on the IEEE 1588 precision time protocol. The specific goal was to examine the feasibility of meeting 5G phase synchronization requirements while distributing PTP over legacy Ethernet fronthaul networks lacking specialized timing support.

    To accomplish the investigation, Igor and his research team leveraged the Ethernet fronthaul testbed developed in a previous project. They implemented a sophisticated data acquisition system and dedicated tremendous effort to conceive the most favorable combination of estimation algorithms to post-process PTP timestamps for better performance. Their work demonstrated nanosecond accuracy capable of enabling the most advanced 5G MIMO transmission schemes.

    The signal processing framework developed by this project has been made open-source. The project is named the PTP dataset analysis library (PTP-DAL), available on GitHub.

    The picture below shows the final stage of the FPGA-based synchronization testbed Igor and his team constructed throughout his Ph.D. program. The testbed comprised three FPGAs, specialized clocks, networking equipment, software-defined radios (USRPs), and measurement instruments. The entire testbench was remotely controllable using Python scripts.

  • 5G Ethernet Fronthaul Testbed

    A testbed to investigate the real-time 5G radio transport over legacy 1000BASE-T Ethernet networks.

    In the evolution from 4G to 5G, the centralized and cloud radio access networks (C-RAN) architecture emerged as an attractive solution for better performance, efficiency, and flexibility. In this context, the industry and academia converged to Ethernet as the preferred networking solution due to being widely available, low cost, and based on asynchronous packet-based transmissions with statistical multiplexing.

    The Ethernet Fronthaul project focused on implementing FPGA-based prototypes of a 5G baseband processing unit (BBU) and a corresponding remote radio unit (RRU), with an intermediate communication using 1000BASE-T Ethernet. At the time, the protocol used on top of Ethernet to convey radio data was open to discussion. This research project implemented a custom packetization solution similar to what years later became the eCPRI specification. This project was sponsored by Ericsson Research and conducted by dozens of masters and doctoral students at the Federal University of Pará (Belém, Brazil).

    The picture below indicates the BBU and RRU FPGA prototypes conveying an LTE signal in real-time. The central monitor shows the analysis from a vector signal analyzer, showing the signal’s spectrum and 64-QAM constellation. The oscilloscope on the right shows the clock synchronization between the BBU and RRU devices.

  • DSP for Optical Communications

    Highly parallelized implementation of polyphase filtering for pulse shaping in coherent optical transceivers.

    The research proposed an innovative implementation architecture for a fractional sample rate converter designed for pulse shaping within coherent optical transceivers. The proposed architecture focused on improving the parallelization to enable its implementation on FPGAs clocked at low frequencies. The architecture could process and feed baseband samples from (to) analog-to-digital converters operating at optical-grade rates (e.g., at 400 giga-samples/seconds).

  • Interference Cancellation in

    Algorithms to mitigate the insufficient cyclic prefix distortion and alien crosstalk in DSL.

    During 2013 and 2014, the industry was working to standardize the next Digital Subscriber Line (DSL) generation denominated This new standard enhanced the transmission bandwidth up to 200 MHz, which was vital to achieving superior data rates but brought several engineering challenges. At this point, the Signal Processing Laboratory (LAPS) at the Federal University of Pará was actively involved in researching and prototyping the technology. By that time, Igor joined the project as an undergraduate student and conducted two main investigations.

    His first investigation concerned the issue of insufficient cyclic prefix distortion in discrete multitone (DMT) systems. Under the broadband of 200 MHz considered for at the time, the channel dispersion could exceed the cyclic prefix guard band adopted by DSL predecessors such as VDSL. In this context, the goal was to investigate the feasibility of maintaining short (strictly insufficient) cyclic prefixes while mitigating the residual dispersion using novel low-complexity algorithms.

    The second investigation concerned the issue of crosstalk between uncoordinated transmission lines from independent operators. The so-called alien (out-of-domain) crosstalk introduced by such lines causes severe degradation in the system’s capacity, and its mitigation becomes essential. While supporting the work of a Ph.D. student colleague, Igor investigated an alien crosstalk mitigation method based on noise prediction. Their work aimed to provide guidelines about the feasibility of the crosstalk mitigation technique.